Offres d'Emploi Synopsys
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Synopsys, Inc.-Ottawa
Job Description and Requirements:
At Synopsys, we are at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the...
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Synopsys Inc-Ottawa
Join to apply for the ASIC Digital Design, Sr. Staff Engineer-10658 role at Synopsys Inc
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Join to apply for the ASIC Digital Design, Sr. Staff Engineer-10658 role at Synopsys Inc
Job Description...
Synopsys, Inc.-London
Position: ASIC Digital Design, Staff
Locations: Mississauga, Markham, Ottawa, Canada Remote
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from...
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StarIC-Canada
VHDL and/or Verilog design and simulation
• Front-End tools experience (Synopsys, Cadence and/or Mentor’s) and flow experience are highly desired including verification, simulators, synthesis, STA, back-annotation and gate-level simulation.
• Experience...
Synopsys, Inc.-Ottawa
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP...
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LanceSoft, Inc.-Markham
analyzing the timing reports and identifying both the design and constraints related issues.
• Ability to multitask, ramp up quickly on new flows/tools/ideas.
• Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc...
Synopsys, Inc.-Ottawa
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP...
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HaiLa-Montréal
Support IC validation and characterization efforts.
Key requirements:
• Solid understanding of analog/mixed-signal design flows (Cadence, Mentor, Synopsys, etc.) in a Linux environment, specifically Virtuoso schematic and layout, and EMX.
• Excellent...
Synopsys, Inc.-Ottawa
We Are:
At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP...
appcast.io -
StarIC-Newmarket
VHDL and/or Verilog design and simulation
• Front-End tools experience (Synopsys, Cadence and/or Mentor’s) and flow experience are highly desired including verification, simulators, synthesis, STA, back-annotation and gate-level simulation.
• Experience...
40 emplois similaires : Kamloops, Saint-Joseph-de-Beauce, Red Deer, Mirabel, Burlington...
beBeePhysical-Markham
experience with industry-standard EDA tools for synthesis, PNR, and STA, EMIR (e.g., Synopsys Design Compiler/ICC2/Custom Compiler, Cadence Genus/Innovus/Virtuoso, PrimeTime, Redhawk).
• Familiarity with timing constraint generation (SDC).
• Basic...
LanceSoft, Inc.-Toronto
analyzing the timing reports and identifying both the design and constraints related issues.
• Ability to multitask, ramp up quickly on new flows/tools/ideas.
• Preferred EDA tool experience: Synopsys Design Compiler/Primetime, Spyglass, Fishtail etc...
beBeeDesign-Markham
scripting capability
• Ability to multitask and work under pressure
• Experience with analyzing timing reports and identifying design and constraint-related issues
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Preferred Qualifications:
• Experience with EDA tools such as Synopsys Design Compiler...
Astera Labs-Toronto
on designs at nodes ≤ 16nm.
• Utilize tools from Synopsys/Cadence for design and emulation.
Basic Qualifications:
• Bachelor’s in Electronics/Electrical engineering (Master's preferred).
• 12+ years of digital design experience, with 4+ years focused...
Advanced Micro Devices inc.-Markham
and Synopsys tools (ICC/ICC2/ICV). Experience doing physical verification for tile of chip physical design would be an asset. Perl programming, TCL, SVRF, TVF programming not required, but would be advantages IP layout design experience...
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