[ref. j38535204] Sr. Staff Analog and Mixed Signal Design Engineer

Category Engineering Hire Type Employee Job ID 5993 Remote Eligible No Date Posted 18/09/2024

PLL designs will support high-speed Serdes designs including PCI-Express, Ethernet, CPRI, and other applications at rates up to 112Gbps, 128Gbps, 224Gbps and beyond.

Responsibilities and Duties:

• Circuit-level PLL design and PLL top-level modeling and simulation
• Design of analog circuits such as VCOs, charge pumps and voltage regulators
• Custom circuit design in deep-submicron and FINFET CMOS technologies
• Design of high-speed digital circuits such as dividers and clock distribution paths
• Schematic entry and spice simulation of custom circuits
• Provide mentoring and technical leadership to junior designers
• Coordinate and interface with layout and CAD teams

Qualifications and Experience:

• 8+ years of experience within CMOS analog and mixed-signal circuit design with MSEE or PhD. Candidates with a Bachelor’s degree and additional experience will also be considered
• Detailed knowledge of PLL loop operation and design
• Experienced in design of SerDes blocks and/or PLL circuit components such as VCO's, charge-pumps, regulators and high-speed dividers.
• Design experience in FINFET and gate all around CMOS technologies
• Hspice, Finesim, PrimeSim or similar spice-type simulators
• Schematic entry in Synopsys Custom Designer or similar tools
• Knowledge of digital timing in PrimeTime and/or Nanotime is an asset

Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.

If you share our passion for innovation, we want to meet you.

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Should you require an accommodation, please contact hr-help-canada@synopsys.com.